ELECTRONIC MEMORY DEVICES

**Definition:** This place covers:

Memory devices consisting of multiple semiconductor or solid-state components. This includes the multiple memory cells constituting the memory core region and logic components within the immediate peripheral region surrounding the memory core region. The memory cells have storage components therein, which may be accessed by selection components.

This includes the following kind of devices:

Volatile Memory Devices:

Non-Volatile Memory Devices:

Assemblies of multiple devices comprising at least one memory device of this subclass.

Processes and apparatus specially adapted for the manufacture or treatment of such devices.

**Glossary:** - chip: a piece of a wafer or a substrate that has been processed to contain devices therein or thereon. The expression "diced chip" refers to the result of dicing a wafer or a substrate into a plurality of chips, whereas "undiced chip" refers to a chip before dicing or with no dicing. - device: an electric circuit element (e.g. diode, transistor, LED, etc.); (depending on the context) can also refer to an integrated device (e.g. CMOS-IC, DRAM device, etc.). A device may be in the form of a bare or packaged chip. - dopant: the atoms or compounds added to a material during doping - doping: the intentional addition of a small quantity of atoms or compounds into a material to achieve a desired characteristic, e.g. to produce an n-type or p-type material - individual: refers to: an electric circuit element not being an integrated device; or a component of an integrated device. Examples of individual devices include: diodes, transistors, photovoltaic cells, Josephson-junction devices, light-emitting diodes [LED], organic LEDs or a single LED component within an integrated device. - integrated device: a device consisting of a plurality of semiconductor or other solid-state electric circuit elements formed in or on a common substrate - integrated circuit: an integrated device where all the electric circuit elements (e.g. diodes, transistors, LEDs, etc.) are formed in or on a common substrate, including interconnections between the elements - component: an electric circuit element (e.g. diode, transistor, LED, etc.) that is one of a plurality of elements formed in or on a common substrate, e.g. in an integrated device - wafer: it can be one of the following: (a) a slice of semiconductor or electric solid-state active material. For example: a slice of silicon; a slice of a semiconducting compound, e.g. gallium nitride [GaN]; a slice of lithium tantalate [LiTaO 3 ] for superconductor applications. (b) A multilayered laminate, having at least one layer of semiconductor or electric solid-state active material, the layer being meant to be processed into devices. For example: silicon-on-insulator [SOI]; silicon-on-glass [SOG]; silicon-on-sapphire [SOS]; a composite wafer comprising silicon carbide [SiC] on polycrystalline silicon [Si] support; a layer of semiconducting nanowires on glass. A wafer is typically processed by (e.g.) deposition, etching, doping or diffusion, and is then typically diced into chips. - body: the region of semiconductor (resp. solid-state) material(s) within which, or at the surface of which, the physical effects that are characteristic of the device occur, and any bordering semiconductor (resp. solid-state) material(s) that are contiguous with this region. Examples: in a field-effect transistor [FET], the physical effects occur in the channel region between the source and the drain. The semiconductor body includes the channel region, the source and drain regions, and any contiguous semiconductor material; in a light-emitting diode [LED], the physical effects occur at a junction of active semiconductor layers. The semiconductor body includes these active semiconductor layers and any contiguous semiconductor layers, such as buffer layers, possibly a growth substrate, etc., that are between the cathode and anode electrodes; in a thermoelectric device, the solid-state body includes all solid-state materials in the path of current between the electrodes. - electrode: a conductive region in or on the semiconductor body or solid-state body of a device (and other than the body itself) which exerts an electrical influence on the body, irrespective of whether or not an external electrical connection is made thereto. The term covers metallic regions which exert electrical influence on the body through an insulating region (e.g. in intentional non-parasitic capacitive coupling), or inductive coupling arrangements. In a capacitive coupling arrangement, the dielectric region is regarded as part of the electrode. The overall conductive wiring may comprise multiple portions. In such a case, only the wiring portions that exert an electrical influence on the body are considered portions of the electrode. Examples: conductive layer(s) in direct physical contact with the body; conductive region(s) exerting an inductive coupling onto the body; a multilayer structure which exerts influence on the body through an insulating region, e.g. in intentional non-parasitic capacitive coupling. - interconnection: a conductive arrangement for conducting electric current from an electrode of a circuit element to another part of the circuit. Examples include metal wirings. - container: a solid construction in which (one or more) devices are placed, or which is formed around the devices, for forming packaged devices. A container requires a partial or total enclosure and it may also comprise a filling. - encapsulation: an enclosure consisting of (one or more) layers, e.g. comprising organic polymers, which at least partially enclose the (one or more) devices, thereby protecting them. An encapsulation is often used to hermetically seal devices. - field-effect: refers to semiconductor technology wherein a voltage applied to a gate electrode creates an electric field that allows for control of current near the interface of the gate and the body, e.g. to create an inversion channel between the source and drain of a MOSFET - package: the collection of all elements, which are external to the chip, that protect the chip or connect it to another object. Package therefore covers encapsulations, containers, package substrates, interposers, heatsinks or the like. Package does not include objects at a higher system level, like circuit boards and beyond, e.g. a housing in which the circuit board is enclosed. - unipolar: refers to semiconductor technology that primarily involves one type only of charge carrier, i.e. it involves either holes or electrons but not both - bipolar: refers to semiconductor technology that involves multi-carrier-type operation, i.e. which simultaneously uses both electrons and holes as charge carriers - MIS: metal-insulator-semiconductor - MOS: metal-oxide-semiconductor - FET: field-effect transistor - MISFET: metal-insulator-semiconductor field-effect transistor - TFT: thin-film transistor - programming: setting a desired state of a memory cell - writing, erasing: changing the state of a memory cell, in a memory cell wherein programming can occur as many times as desired - core, core region: the portion of a memory cell having storage components, select components, or data lines such as bit lines and word lines. The core also includes devices for local accessing (e.g. reading, writing or erasing) of the storage elements, for example, select transistors of NAND strings or read/write ports of SRAM. - peripheral region, periphery: the portion of a memory device outside the core region having devices or parts for global accessing (e.g. reading, writing, erasing) of the devices of the core region. It includes, e.g. word line drivers, multiplexers or sense amplifiers. - boundary region between the core region and peripheral circuit region: the portion of a memory device that contains neither core devices (e.g. storage components or select components) nor peripheral devices (e.g. word line drivers or multiplexers), typically comprising structural parts such as bit line fan-outs between the core region and the peripheral region, or dummy elements or staircase structures for 3D NAND